about

(2013) NSF CAREER Award.

(2013) Best Paper Nomination, Asia and South Pacific Design Automation Conference (ASP-DAC) for the paper titled "Compiler-Assisted Refresh Minimization for Volatile STT-RAM Cache".

(2012) 49th Design Automation Conference A. Richard Newton Scholarship for Ph.D. student Wujie Wen.

(2011) Best Paper Nomination, Asia and South Pacific Design Automation Conference (ASP-DAC) for the paper titled "Geometry Variations Analysis of TiO2 Thin Film and Spintronic Memristors".

(2011 - 2012) 3. Two Times Air Force Visiting Faculty Research Program (VFRP) Fellowship, AFRL/RIB, Rome, NY, 2011, 2012. (Selected extensions of $10,000 and $8000 grants are also approved for Sep.-Dec. 2011, and 2012, respectively).

(2010) 6. Best Paper Award, ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED) for the paper titled "Combined Magnetic- and Circuit-level Enhancements for the Nondestructive Self-Reference Scheme of STT-RAM".

(2010) 7. Best Paper Nomination, Design, Automation & Test in Europe Conference and Exhibition (DATE) for the paper titled "A Nondestructive Self-Reference Scheme for Spin-Transfer Torque Random Access Memory (STT-RAM)".

(2010) Best Paper Nomination, the 11th International Symposium on Quality Electronic Design (ISQED) for the paper titled "Scalability of PCMO-based Resistive Switch Device in DSM Technologies".

(2008) Best Paper Award, the 9th International Symposium on Quality Electronic Design (ISQED) for paper titled "Design Margin Exploration of Spin-Torque Transfer RAM (SPRAM)".

(2007) Finalists of Prestigious 2007 DesignVision Awards for PrimeTimeVX, International Engineering Cons.

(2006) PrimeTimeVX - EDN 100 Hot Products Distinction, Synopsys Inc..

(2006) The hot 100 products of 2006 for PrimeTimeVX, EDN (www.edn.com).

(2005) Best Paper Nomination, the 6th International Symposium on Quality Electronic Design (ISQED) for the paper titled "Power Supply Noise-aware Scheduling and Allocation for DSP Synthesis".

Ph.D., Electrical and Computer engineering, Purdue University, 2005

M.S., Electronic Engineering, Tsinghua University, 2001

B.S., Electronic Engineering, Tsinghua University, 1998

Chai, X., Fu, X., Gan, Z., Zhang, Y., Lu, Y., & Chen, Y. (2020). An efficient chaos-based image compression and encryption scheme using block compressive sensing and elementary cellular automata. Neural Computing and Applications, 32(9), 4961-4988.Springer Science and Business Media LLC. doi: 10.1007/s00521-018-3913-3.

Chai, X., Fu, X., Gan, Z., Lu, Y., & Chen, Y. (2019). A color image cryptosystem based on dynamic DNA encryption and chaos. Signal Processing, 155, 44-62.Elsevier BV. doi: 10.1016/j.sigpro.2018.09.029.

Chai, X., Gan, Z., Yuan, K., Chen, Y., & Liu, X. (2019). A novel image encryption scheme based on DNA sequence operations and chaotic systems. Neural Computing and Applications, 31(1), 219-237.Springer Science and Business Media LLC. doi: 10.1007/s00521-017-2993-9.

Chen, Y. (2019). Reshaping Future Computing Systems With Emerging Nonvolatile Memory Technologies. IEEE Micro, 39(1), 54-57.Institute of Electrical and Electronics Engineers (IEEE). doi: 10.1109/mm.2018.2885588.

Li, S., Xiao, N., Wang, P., Sun, G., Wang, X., Chen, Y., Li, H.H., Cong, J., & Zhang, T. (2019). RC-NVM: Dual-Addressing Non-Volatile Memory Architecture Supporting Both Row and Column Memory Accesses. IEEE Transactions on Computers, 68(2), 239-254.Institute of Electrical and Electronics Engineers (IEEE). doi: 10.1109/tc.2018.2868368.

Yang, J., Wang, X., Zhou, Q., Wang, Z., Li, H., Chen, Y., & Zhao, W. (2019). Exploiting Spin-Orbit Torque Devices As Reconfigurable Logic for Circuit Obfuscation. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 38(1), 57-69.Institute of Electrical and Electronics Engineers (IEEE). doi: 10.1109/tcad.2018.2802870.

Zhou, Y., Hu, X., Wang, L., Duan, S., & Chen, Y. (2019). Markov Chain Based Efficient Defense Against Adversarial Examples in Computer Vision. IEEE Access, 7, 5695-5706.Institute of Electrical and Electronics Engineers (IEEE). doi: 10.1109/access.2018.2889409.

Bayram, I., & Chen, Y. (2018). NV-TCAM: Alternative designs with NVM devices. Integration, 62, 114-122.Elsevier BV. doi: 10.1016/j.vlsi.2018.02.003.

Chai, X., Zheng, X., Gan, Z., Han, D., & Chen, Y. (2018). An image encryption algorithm based on chaotic system and compressive sensing. Signal Processing, 148, 124-144.Elsevier BV. doi: 10.1016/j.sigpro.2018.02.007.

Chang, N., Faruque, M.A., Shao, Z., Xue, C.J., Chen, Y., & Baek, D. (2018). Survey of Low-Power Electric Vehicles: A Design Automation Perspective. IEEE Design & Test, 35(6), 44-70.Institute of Electrical and Electronics Engineers (IEEE). doi: 10.1109/mdat.2018.2873475.

Chen, L., Li, C., & Chen, Y. (2018). A Forgetting Memristive Spiking Neural Network for Pavlov Experiment. International Journal of Bifurcation and Chaos, 28(06), 1850080.World Scientific Pub Co Pte Lt. doi: 10.1142/s0218127418500803.

Chen, Y., Li, H.H., Wu, C., Song, C., Li, S., Min, C., Cheng, H.P., Wen, W., & Liu, X. (2018). Neuromorphic computing's yesterday, today, and tomorrow - an evolutional view. INTEGRATION-THE VLSI JOURNAL, 61, 49-61.Elsevier BV. doi: 10.1016/j.vlsi.2017.11.001.

Guo, J., Min, C., Cai, T., & Chen, Y. (2018). Improving Write Performance and Extending Endurance of Object-Based NAND Flash Devices. ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS, 17(1), 1-26.Association for Computing Machinery (ACM). doi: 10.1145/3105924.

Hassan, A.M., Khalaf, A.F., Sayed, K.S., Li, H.H., & Chen, Y. (2018). Real-Time Cardiac Arrhythmia Classification Using Memristor Neuromorphic Computing System. Annu Int Conf IEEE Eng Med Biol Soc, 2018, 2567-2570.IEEE. doi: 10.1109/EMBC.2018.8512868.

Liu, Z., Mao, M., Liu, T., Wang, X., Wen, W., Chen, Y., Li, H., Wang, D., Pei, Y., & Ge, N. (2018). TriZone: A Design of MLC STT-RAM Cache for Combined Performance, Energy, and Reliability Optimizations. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 37(10), 1985-1998.Institute of Electrical and Electronics Engineers (IEEE). doi: 10.1109/tcad.2017.2783860.

Lu, Y.H., Berg, A.C., & Chen, Y. (2018). Low-Power Image Recognition Challenge. AI Magazine, 39(2), 87-88.Association for the Advancement of Artificial Intelligence (AAAI). doi: 10.1609/aimag.v39i2.2782.

Wang, D., Ma, L., Zhang, M., An, J., Li, H.H., & Chen, Y. (2018). Shift-Optimized Energy-Efficient Racetrack-Based Main Memory. Journal of Circuits, Systems and Computers, 27(05), 1850081.World Scientific Pub Co Pte Lt. doi: 10.1142/s0218126618500810.

Yan, B., Chen, Y., & Li, H. (2018). Challenges of memristor based neuromorphic computing system. Science China Information Sciences, 61(6).Springer Science and Business Media LLC. doi: 10.1007/s11432-017-9378-3.

Zhang, L., Song, W., Yang, J.J., Li, H., & Chen, Y. (2018). A compact model for selectors based on metal doped electrolyte. APPLIED PHYSICS A-MATERIALS SCIENCE & PROCESSING, 124(4).Springer Science and Business Media LLC. doi: 10.1007/s00339-018-1706-2.

Chai, X., Chen, Y., & Broyde, L. (2017). A novel chaos-based image encryption algorithm using DNA sequence operations. Optics and Lasers in Engineering, 88, 197-213.Elsevier BV. doi: 10.1016/j.optlaseng.2016.08.009.

Chai, X., Gan, Z., Chen, Y., & Zhang, Y. (2017). A visually secure image encryption scheme based on compressive sensing. Signal Processing, 134, 35-51.Elsevier BV. doi: 10.1016/j.sigpro.2016.11.016.

Chai, X., Gan, Z., Lu, Y., Chen, Y., & Han, D. (2017). A novel image encryption algorithm based on the chaotic system and DNA computing. International Journal of Modern Physics C, 28(05), 1750069.World Scientific Pub Co Pte Lt. doi: 10.1142/s0129183117500693.

Chai, X., Gan, Z., Yang, K., Chen, Y., & Liu, X. (2017). An image encryption algorithm based on the memristive hyperchaotic system, cellular automata and DNA sequence operations. Signal Processing: Image Communication, 52, 6-19.Elsevier BV. doi: 10.1016/j.image.2016.12.007.

Chai, X.L., Gan, Z.H., Yuan, K., Lu, Y., & Chen, Y.R. (2017). An image encryption scheme based on three-dimensional Brownian motion and chaotic system. CHINESE PHYSICS B, 26(2), 020504.IOP Publishing. doi: 10.1088/1674-1056/26/2/020504.

Chen, X., Khoshavi, N., DeMara, R.F., Wang, J., Huang, D., Wen, W., & Chen, Y. (2017). Energy-Aware Adaptive Restore Schemes for MLC STT-RAM Cache. IEEE TRANSACTIONS ON COMPUTERS, 66(5), 786-798.Institute of Electrical and Electronics Engineers (IEEE). doi: 10.1109/TC.2016.2625245.

Chen, Y., Kuo, T.W., & de Salvo, B. (2017). Guest Editors’ Introduction: Critical and Enabling Techniques for Emerging Memories. IEEE Design & Test, 34(3), 6-7.Institute of Electrical and Electronics Engineers (IEEE). doi: 10.1109/mdat.2017.2682253.

Chen, Y., Li, H.H., Bayram, I., & Eken, E. (2017). Recent Technology Advances of Emerging Memories. IEEE DESIGN & TEST, 34(3), 8-22.Institute of Electrical and Electronics Engineers (IEEE). doi: 10.1109/MDAT.2017.2685381.

Chen, Y.C., Wang, Y., Zhang, W., Chen, Y., & (Helen) Li, H. (2017). In-place Logic Obfuscation for Emerging Nonvolatile FPGAs. In Fundamentals of IP and SoC Security. (pp. 277-293).Springer International Publishing. doi: 10.1007/978-3-319-50057-7_11.

Eken, E., Bayram, I., Zhang, Y., Yan, B., Wu, W., Li, H.H., & Chen, Y. (2017). Giant Spin-Hall assisted STT-RAM and logic design. INTEGRATION-THE VLSI JOURNAL, 58, 253-261.Elsevier BV. doi: 10.1016/j.vlsi.2017.04.002.

Guo, J., Wang, D., Shao, Z., & Chen, Y. (2017). Data-Pattern-Aware Error Prevention Technique to Improve System Reliability. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 25(4), 1433-1443.Institute of Electrical and Electronics Engineers (IEEE). doi: 10.1109/TVLSI.2016.2642055.

Guo, J., Wen, W., Hu, J., Wang, D., Li, H., & Chen, Y. (2017). FlexLevel NAND Flash Storage System Design to Reduce LDPC Latency. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 36(7), 1167-1180.Institute of Electrical and Electronics Engineers (IEEE). doi: 10.1109/TCAD.2016.2619480.

Hu, M., Chen, Y., Yang, J.J., Wang, Y., & Li, H.H. (2017). A Compact Memristor-Based Dynamic Synapse for Spiking Neural Networks. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 36(8), 1353-1366.Institute of Electrical and Electronics Engineers (IEEE). doi: 10.1109/TCAD.2016.2618866.

Li, H., & Chen, Y. (2017). Nonvolatile Memory Design. 1-189.CRC Press. doi: 10.1201/b11354.

Li, H.H., Chen, Y., Liu, C., Strachan, J.P., & Davila, N. (2017). Looking Ahead for Resistive Memory Technology A broad perspective on ReRAM technology for future storage and computing. IEEE CONSUMER ELECTRONICS MAGAZINE, 6(1), 94-103.Institute of Electrical and Electronics Engineers (IEEE). doi: 10.1109/MCE.2016.2614523.

Mao, M., Wen, W., Zhang, Y., Chen, Y., & Li, H. (2017). An Energy-Efficient GPGPU Register File Architecture Using Racetrack Memory. IEEE Transactions on Computers, 66(9), 1478-1490.Institute of Electrical and Electronics Engineers (IEEE). doi: 10.1109/tc.2017.2690855.

Pan, C., Xie, M., Yang, C., Chen, Y., & Hu, J. (2017). Exploiting Multiple Write Modes of Nonvolatile Main Memory in Embedded Systems. ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS, 16(4), 1-26.Association for Computing Machinery (ACM). doi: 10.1145/3063130.

Sun, G., & Chen, Y. (2017). Preface. 10561 LNCS.

Yang, C., Li, H., & Chen, Y. (2017). Security Opportunities in Nano Devices and Emerging Technologies. In Security Opportunities in Nano Devices and Emerging Technologies. (pp. 215-234).CRC Press. doi: 10.1201/9781315265056.

Zhang, P., Li, C., Huang, T., Chen, L., & Chen, Y. (2017). Forgetting memristor based neuromorphic system for pattern training and recognition. NEUROCOMPUTING, 222, 47-53.Elsevier BV. doi: 10.1016/j.neucom.2016.10.012.

Zhang, Y., Wen, W., Li, H., & Chen, Y. (2017). Metallic Spintronic Devices. In Metallic Spintronic Devices. (pp. 71-103).CRC Press. doi: 10.1201/b17238.

Zhang, Y., Yan, B., Wang, X., & Chen, Y. (2017). Persistent and Nonpersistent Error Optimization for STT-RAM Cell Design. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 36(7), 1181-1192.Institute of Electrical and Electronics Engineers (IEEE). doi: 10.1109/tcad.2016.2619484.

Chai, X.L., Gan, Z.H., Lu, Y., Zhang, M.H., & Chen, Y.R. (2016). A novel color image encryption algorithm based on genetic recombination and the four-dimensional memristive hyperchaotic system. CHINESE PHYSICS B, 25(10), 100503.IOP Publishing. doi: 10.1088/1674-1056/25/10/100503.

Chen, L., Li, C., Huang, T., Hu, X., & Chen, Y. (2016). The bipolar and unipolar reversible behavior on the forgetting memristor model. NEUROCOMPUTING, 171, 1637-1643.Elsevier BV. doi: 10.1016/j.neucom.2015.06.067.

Gu, S., Sha, E.H.M., Zhuge, Q., Chen, Y., & Hu, J. (2016). A Time, Energy, and Area Efficient Domain Wall Memory-Based SPM for Embedded Systems. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 35(12), 2008-2017.Institute of Electrical and Electronics Engineers (IEEE). doi: 10.1109/tcad.2016.2547903.

Liu, X., Mao, M., Liu, B., Li, B., Wang, Y., Jiang, H., Barnell, M., Wu, Q., Yang, J., Li, H., & Chen, Y. (2016). Harmonica: A Framework of Heterogeneous Computing Systems With Memristor-Based Neuromorphic Computing Accelerators. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 63(5), 617-628.Institute of Electrical and Electronics Engineers (IEEE). doi: 10.1109/TCSI.2016.2529279.

Sun, G., Zhang, C., Li, P., Wang, T., & Chen, Y. (2016). Statistical Cache Bypassing for Non-Volatile Memory. IEEE TRANSACTIONS ON COMPUTERS, 65(11), 3427-3440.Institute of Electrical and Electronics Engineers (IEEE). doi: 10.1109/TC.2016.2529621.

Yang, J., Sun, Z., Wang, X., Chen, Y., & Li, H. (2016). Spintronic Memristor as Interface Between DNA and Solid State Devices. 6, (pp. 212-221).Institute of Electrical and Electronics Engineers (IEEE). doi: 10.1109/JETCAS.2016.2547700.

Yang, J., Wang, P., Zhang, Y., Cheng, Y., Zhao, W., Chen, Y., & Li, H.H. (2016). Radiation-Induced Soft Error Analysis of STT-MRAM: A Device to Circuit Approach. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 35(3), 380-393.Institute of Electrical and Electronics Engineers (IEEE). doi: 10.1109/TCAD.2015.2474366.

Chen, Y., Choi, K., & Zhao, W. (2015). Guest Editorial for Special Issue on Emerging Memory Technologies—Modeling, Design, and Applications for Multi-Scale Computing. IEEE Transactions on Multi-Scale Computing Systems, 1(3), 125-126.Institute of Electrical and Electronics Engineers (IEEE). doi: 10.1109/tmscs.2015.2505118.

Li, B., Gu, P., Shan, Y., Wang, Y., Chen, Y., & Yang, H. (2015). RRAM-Based Analog Approximate Computing. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 34(12), 1905-1917.Institute of Electrical and Electronics Engineers (IEEE). doi: 10.1109/TCAD.2015.2445741.

Liu, B., Chen, Y., Wysocki, B., & Huang, T. (2015). Reconfigurable Neuromorphic Computing System with Memristor-Based Synapse Design. NEURAL PROCESSING LETTERS, 41(2), 159-167.Springer Science and Business Media LLC. doi: 10.1007/s11063-013-9315-8.

Wang, D.H., Liu, H.P., & Chen, Y.R. (2015). Multi-bit soft error tolerable L1 data cache based on characteristic of data value. Journal of Central South University, 22(5), 1769-1775.Springer Science and Business Media LLC. doi: 10.1007/s11771-015-2695-3.

Wang, P., Eken, E., Zhang, W., Joshi, R., Kanj, R., & Chen, Y. (2015). A Thermal and Process Variation Aware MTJ Switching Model and Its Applications in Soft Error Analysis. In More than Moore Technologies for Next Generation Computer Design. (pp. 101-125).Springer New York. doi: 10.1007/978-1-4939-2163-8_5.

Wen, S., Huang, T., Zeng, Z., Chen, Y., & Li, P. (2015). Circuit design and exponential stabilization of memristive neural networks. NEURAL NETWORKS, 63, 48-56.Elsevier BV. doi: 10.1016/j.neunet.2014.10.011.

Wen, W., Zhang, Y., & Chen, Y. (2015). Statistical Reliability/Energy Characterization in STT-RAM Cell Designs. In Spintronics-based Computing. (pp. 201-230).Springer International Publishing. doi: 10.1007/978-3-319-15180-9_7.

Zhang, L., Ge, N., Yang, J.J., Li, Z., Williams, R.S., & Chen, Y. (2015). Low voltage two-state-variable memristor model of vacancy-drift resistive switches. APPLIED PHYSICS A-MATERIALS SCIENCE & PROCESSING, 119(1), 1-9.Springer Science and Business Media LLC. doi: 10.1007/s00339-015-9033-3.

Zhang, Y., Li, Y., Sun, Z., Li, H., Chen, Y., & Jones, A.K. (2015). Read Performance: The Newest Barrier in Scaled STT-RAM. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 23(6), 1170-1174.Institute of Electrical and Electronics Engineers (IEEE). doi: 10.1109/TVLSI.2014.2326797.

Zhang, Y., Yan, B., Kang, W., Cheng, Y., Klein, J.O.Zhang, Y., Chen, Y., & Zhao, W. (2015). Compact Model of Subvolume MTJ and Its Design Application at Nanoscale Technology Nodes. IEEE TRANSACTIONS ON ELECTRON DEVICES, 62(6), 2048-2055.Institute of Electrical and Electronics Engineers (IEEE). doi: 10.1109/TED.2015.2414721.

Chen, L., Li, C., Huang, T., Ahmad, H.G., & Chen, Y. (2014). A phenomenological memristor model for short-term/long-term memory. PHYSICS LETTERS A, 378(40), 2924-2930.Elsevier BV. doi: 10.1016/j.physleta.2014.08.018.

Chen, L., Li, C., Huang, T., Chen, Y., & Wang, X. (2014). Memristor crossbar-based unsupervised image learning. NEURAL COMPUTING & APPLICATIONS, 25(2), 393-400.Springer Science and Business Media LLC. doi: 10.1007/s00521-013-1501-0.

Chen, Y., Guo, J., & Sun, Z. (2014). CPU-GPU System Designs for High Performance Cloud Computing. In High Performance Cloud Auditing and Applications. 9781461432968, (pp. 283-299).Springer New York. doi: 10.1007/978-1-4614-3296-8_11.

Chen, Y., Li, H., & Sun, Z. (2014). Spintronic Memristor as Interface Between DNA and Solid State Devices. In Memristors and Memristive Systems. 9781461490685, (pp. 281-298).Springer New York. doi: 10.1007/978-1-4614-9068-5_9.

Eken, E., Zhang, Y., Wen, W., Joshi, R., Li, H., & Chen, Y. (2014). A Novel Self-Reference Technique for STT-RAM Read and Write Reliability Enhancement. IEEE Transactions on Magnetics, 50(11), 1-4.Institute of Electrical and Electronics Engineers (IEEE). doi: 10.1109/tmag.2014.2323196.

Hu, M., Li, H., Chen, Y., Wu, Q., Rose, G.S., & Linderman, R.W. (2014). Memristor Crossbar-Based Neuromorphic Computing System: A Case Study. IEEE TRANSACTIONS ON NEURAL NETWORKS AND LEARNING SYSTEMS, 25(10), 1864-1878.Institute of Electrical and Electronics Engineers (IEEE). doi: 10.1109/TNNLS.2013.2296777.

Kai, B., Yi-ran, C., Hui, X., Wei, Y., & Qi-you, X. (2014). NAND flash service lifetime estimate with recovery effect and retention time relaxation. JOURNAL OF CENTRAL SOUTH UNIVERSITY, 21(8), 3205-3213.Springer Science and Business Media LLC. doi: 10.1007/s11771-014-2292-x.

Nixon, K.W., Chen, Y., Mao, Z.H., & Li, K. (2014). User Classification and Authentication for Mobile Device Based on Gesture Recognition. In Advances in Information Security. 55, (pp. 125-135).Springer New York. doi: 10.1007/978-1-4614-7597-2_8.

Sun, G., Dong, X., Chen, Y., & Xie, Y. (2014). An Energy-Efficient 3D Stacked STT-RAM Cache Architecture for CMPs. In Emerging Memory Technologies. 9781441995513, (pp. 145-167).Springer New York. doi: 10.1007/978-1-4419-9551-3_6.

Sun, G., Joo, Y., Chen, Y., Chen, Y., & Xie, Y. (2014). A Hybrid Solid-State Storage Architecture for the Performance, Energy Consumption, and Lifetime Improvement. In Emerging Memory Technologies. 9781441995513, (pp. 51-77).Springer New York. doi: 10.1007/978-1-4419-9551-3_3.

Wen, W., Zhang, Y., Chen, Y., Wang, Y., & Xie, Y. (2014). PS3-RAM: A Fast Portable and Scalable Statistical STT-RAM Reliability/Energy Analysis Method. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 33(11), 1644-1656.Institute of Electrical and Electronics Engineers (IEEE). doi: 10.1109/TCAD.2014.2351581.

Zhang, Y., Wen, W., & Chen, Y. (2014). Asymmetry in STT-RAM Cell Operations. In Emerging Memory Technologies. 9781441995513, (pp. 117-144).Springer New York. doi: 10.1007/978-1-4419-9551-3_5.

Chen, L., Li, C., Huang, T., Chen, Y., Wen, S., & Qi, J. (2013). A synapse memristor model with forgetting effect. PHYSICS LETTERS A, 377(45-48), 3260-3265.Elsevier BV. doi: 10.1016/j.physleta.2013.10.024.

Chen, Y., Wong, W.F., Li, H., Koh, C.K., Zhang, Y., & Wen, W. (2013). On-Chip Caches Built on Multilevel Spin-Transfer Torque RAM Cells and Its Optimizations. ACM JOURNAL ON EMERGING TECHNOLOGIES IN COMPUTING SYSTEMS, 9(2), 1-22.Association for Computing Machinery (ACM). doi: 10.1145/2463585.2463592.

Li, Y., Zhang, Y., LI, H., Chen, Y., & Jones, A.K. (2013). C1C. ACM Transactions on Architecture and Code Optimization, 10(4), 1-22.Association for Computing Machinery (ACM). doi: 10.1145/2541228.2555308.

Miao Hu, Hai Li, Yiran Chen, Qing Wu, & Rose, G.S. (2013). BSB training scheme implementation on memristor-based circuit. 2013 IEEE Symposium on Computational Intelligence for Security and Defense Applications (CISDA), (pp. 80-87).IEEE. doi: 10.1109/cisda.2013.6595431.

Wen, S., Bao, G., Zeng, Z., Chen, Y., & Huang, T. (2013). Global exponential synchronization of memristor-based recurrent neural networks with time-varying delays. Neural Netw, 48, 195-203.Elsevier BV. doi: 10.1016/j.neunet.2013.10.001.

Wen, S., Zeng, Z., Huang, T., & Chen, Y. (2013). Passivity analysis of memristor-based recurrent neural networks with time-varying delays. Journal of the Franklin Institute, 350(8), 2354-2370.Elsevier BV. doi: 10.1016/j.jfranklin.2013.05.026.

Wen, S., Zeng, Z., Huang, T., & Chen, Y. (2013). Fuzzy modeling and synchronization of different memristor-based chaotic circuits. Physics Letters A, 377(34-36), 2016-2021.Elsevier BV. doi: 10.1016/j.physleta.2013.05.046.

Zhao, B., Yang, J., Zhang, Y., Chen, Y., & Li, H. (2013). Common-Source-Line Array: An Area Efficient Memory Architecture for Bipolar Nonvolatile Devices. ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, 18(4), 1-18.Association for Computing Machinery (ACM). doi: 10.1145/2500459.

Chen, Y., Li, H., Wang, X., Zhu, W., Xu, W., & Zhang, T. (2012). A 130 nm 1.2 V/3.3 V 16 Kb Spin-Transfer Torque Random Access Memory With Nondestructive Self-Reference Sensing Scheme. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 47(2), 560-573.Institute of Electrical and Electronics Engineers (IEEE). doi: 10.1109/JSSC.2011.2170778.

Li, Y., Zhang, Y., Chen, Y., & Jones, A.K. (2012). Combating Write Penalties Using Software Dispatch for On-Chip MRAM Integration. IEEE Embedded Systems Letters, 4(4), 82-85.Institute of Electrical and Electronics Engineers (IEEE). doi: 10.1109/les.2012.2216253.

Sun, Z., Chen, X., Zhang, Y., Li, H., & Chen, Y. (2012). Nonvolatile Memories as the Data Storage System for Implantable ECG Recorder. ACM JOURNAL ON EMERGING TECHNOLOGIES IN COMPUTING SYSTEMS, 8(2), 1-16.Association for Computing Machinery (ACM). doi: 10.1145/2180878.2180885.

Sun, Z., Li, H., Chen, Y., & Wang, X. (2012). Voltage Driven Nondestructive Self-Reference Sensing Scheme of Spin-Transfer Torque Memory. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 20(11), 2020-2030.Institute of Electrical and Electronics Engineers (IEEE). doi: 10.1109/TVLSI.2011.2166282.

Zhang, Y., Wen, W., & Chen, Y. (2012). The Prospect of STT-RAM Scaling From Readability Perspective. IEEE Transactions on Magnetics, 48(11), 3035-3038.Institute of Electrical and Electronics Engineers (IEEE). doi: 10.1109/tmag.2012.2203589.

ZHANG, Y., WEN, W., & CHEN, Y. (2012). STT-RAM CELL DESIGN CONSIDERING MTJ ASYMMETRIC SWITCHING. SPIN, 02(03), 1240007.World Scientific Pub Co Pte Lt. doi: 10.1142/s2010324712400073.

Chen, Y., Wong, W.F., Li, H., & Koh, C.K. (2011). Processor caches built using multi-level spin-transfer torque RAM cells. IEEE/ACM International Symposium on Low Power Electronics and Design, 73-78.IEEE. doi: 10.1109/islped.2011.5993610.

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Dongku Kang, Yiran Chen, & Roy, K. (2005). Power Supply Noise-Aware Scheduling and Allocation for DSP Synthesis. In Sixth International Symposium on Quality of Electronic Design (ISQED'05), (pp. 48-53).IEEE. doi: 10.1109/isqed.2005.97.

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Research interests

Embedded systems and mobile...
Emerging memory and sensing...
Mobile technology and human-machine...
Nano-electronic devices (silicon...